R & D
Nano Device
Emerging Device
2015 Self-Powered Technology for Internet of Things Chips
The National Nano Device Laboratories (NDL) applied a low-cost, three-dimensional heterogeneous integration technique and successfully integrated low power consumption epi-like transistors, low operation voltage memory devices with, and silicon thin film ambient-light energy harvesters for an integration technique that combines self-power and ambient light energy in IoT Chips applications. The NDL offers this platform to IC designers for developing system-on-chip for integrated sensors and self-powered devices that can be applied to IoT and wearable devices.
Designing monolithic 3D-ICs with low power consumption logic circuits, non-volatile memory, and ambient light energy harvesting technology
A monolithic 3D-IC with ambient light energy harvesting technology

  Developing an Advanced Structure for Sub-10nm Devices Using Dry Etching Technology for Diamond-shaped Gate-all-around Transistor
Germanium has a higher carrier mobility than silicon. Therefore, NDL used a simple method of dry etching to fabricate a novel diamond-shaped channel, which can improve the transport performance of electrons and reduce the leakage current during device operation. The gate-all-around structure provides satisfactory gate control ability and thus is suitable for future development and application of the sub-10nm devices.

  Atomic-Scale Molybdenum Disulfide Two-Dimensional Channel Technique
Molybdenum disulfide is a novel material that has received attention in recent years and examined by numerous academic and industrial personnel. Specifically, it is manufactured as an ultrathin 2D material, which is then heterogeneously integrated with conventional silicon materials. However, the current techniques enable only integrating 2D molybdenum disulfide with planar transistors. The National Nano Device Laboratories was the first to integrate a 4 nanometer thick (six layers of molybdenum disulfide molecules) molybdenum disulfide material with a prevalent FinFET to develop the world’s first FinFET component that features a 2D molybdenum disulfide channel and a unique back-gate control design. This double-gate approach decreases current leakage, thus reducing the energy consumption by half.

2014 Novel Junction-less Field-Effect Transistors- Helping chip manufacturers produce even smaller electronic elements
Junction-less transistors use the simple concept of resistance with one gate to control the density of carriers. The transistors will be less expensive to manufacture. However, as their size continues to shrink, junction-less transistors still face challenges, such as random dopant fluctuation and the short channel effect. NDL has developed a junction-less transistor with a novel structure by achieving an ultra-shallow dopant profile, which ensures that dopants are distributed solely on the channel surface. This design concept ensures that the flow of carriers is concentrated in the outer shell channel, which can eliminate random dopnt fluctuation problems and short channel effects.

  Application of Sub-10 nm 2D Electronic Channel Materials to 3D FETs
After successfully developing "doublefin-height FinFETs" in 2013, the Nano Device Laboratory (NDL) recently incorporated novel high-speed 2D electronic materials in 3D field effect transistors (FETs). NDL's newly developed hybrid Si/2Dlayer channel transistors produced from molybdenum disulfide on a silicon substrate are the first elements of their kind to achieve N-type/P-type complementary symmetrical operation in low-voltage operation, and they make the way for the production of 2D N-type elements with driver currents in excess of 25%.

2013 A New Milestone in IC Manufacturing Technology: Fin Field-effect transistors
Semiconductor research is basically a race to shrink dimensions and enhance performance.
Current semiconductor mass production technology can produce approxima ely 100 million
transistors within 1 cm2 of silicon chip area. NDL's " fin field-effect transistor with different fin
height" process technology can add approximately 20 million transistors to this same area,
which is equivalent to increasing storage capacity or reducing manufacturing costs by 20%.
The results of this research were announced at the 2013 IEEE Symposia on VLSI Technology & Circuits held in Kyoto, Japan, and were also featured in a special report published by the
journal IEEE Spectrum.

NDL's non-planar elements are on a par with those from the world's leading manufacturers

  Monolithic 3D-ICs Offers New Opportunities for the Portable Smart Electronics Industry
Monolithic 3D-IC technology is a kind of three-dimensional chip stacking technology that
does not require Through-Silicon Vias (TSV). The innovative results of monolithic 3DIC
technology developed at NARLabs was selected as a publicity material
at the 2013 International Electron Devices Meeting (IEDM), and articles by TSMC and
NARLabs were the only papers from Taiwan selected, receiving considerable international
media coverage. Conventional TSV 3D IC technology achieves 3D stacking by bonding
different chips together. The innovative monolithic 3D IC technology developed at NDL
improves layer-to-layer distance by a factor of nearly 150 compared with mainstream TSV
3D technology, and also yields much-improved signal transmission speed and energy
consumption. In view of today's short 3C product life cycles and rapid progress in scaling of
semiconductor devices, this new technology will have a major impact on portable
smart devices and relevant industries. This project used lowthermal budget methods
such as plasma-deposited amorphous silicon, laser-crystallization,
chemical-mechanical-polishing, and laser activation to create low-temperature,
stackable ultra-thin channel devices that were able to resolve the problems of
conventional TSV chips with poor alignment in across-chip devices,
large-area metal-interconnect, parasitic capacitance, and high thermal budget issue.
When used in high-speed broadband 3D integrated chips, this technology will facilitate
domestic and foreign manufacturers to develop light, compact energy-conserving mobile
electronics products.

  Broaden Collaboration between Industries and Academiain the Field of High-Frequency Technology
In support of international ARA and ANITAprojects, the two major thrusts of the“Detection
of Ultra-high Energy Cosmic Neutrinos in Antarctica Project”partly funded as the Science
Vanguard Research Program by NFC, NDL has completed the developmentand fabrication
of the low-noise amplifiersthat arethe most critical devicesin the neutrino detector jointly
with an NTU research team. Furthermore, ourverification software for high-frequency device
characteristics was transferred to the semiconductor test systems supplier for improvement
of the product competitiveness.

2012  Participation at IEDM
The IEEE International Electron Devices Meeting (IEDM) is the world's most important
semiconductor element conference, and is often considered the "Olympics of
microelectronic elements." A total of 21 papers from Taiwan were chosen for presentation
(10% of the total) at the 2012 IEDM, including five each from the National Nano Device
Laboratories (NDL) and Macronix, four each from TSMC and National Chiao Tung University,
and one each from the Industrial Technology Research Institute, National Taiwan University,
and National Tsinghua University. Among the topics of the selected papers on memory,
the "Sub-10 nm Resistive Memory" forward-looking research project being conducted by
NDL together with Macronix and National Chiao Tung University, with support from the
National Science and Technology Program in Nanotechnology, is expected to lay a solid
foundation for memory research cooperation between industry, academia, and research
organizations as the semiconductor industry enters the 10 nm era.

  Achieving fast detection of pathogen
The "rapid blood assay chip for the rare pathogen detection" developed at NDL requires
only 5 minutes to perform whole cell detection for microbial pathogens, while also
eliminating the need for timeconsuming and costly processes such as antibody modification,
biochemical reactions, or the rupturing of cells to perform DNA identification.
Simplifying the traditionally complicated processes, the chip requires only a small voltage
source to isolate and concentrate the target pathogens (in approximately 3 minutes),
producing a high-density clump of bacteria. It then takes a "spectral fingerprint" of the target bacteria and performs comparative identification (in less than 2 minutes). The whole detection process is thus completed in less than 5 minutes. Following successful testing, the chip has
been shown to distinguish three of the most common types of bacteria causing bacteremia
and septicemia (Staphylococcus aureus, Pseudomonas aeruginosa, and E. Coli) based on their detected spectral fingerprints. Effective detection can be performed as long as each milliliter
of blood contains several thousand bacteria. The R&D team in this project won the 9th
National Innovation Award in the category of academic research for this groundbreaking

  Environmentally-friendly solar cell technology
A nontoxic no-cadmium copper indium gallium selenium (CIGS) thin-film solar cell developed at NDL features environmentally-friendly technology (3D Optoelectronic Elements,
published in 2012 IEDM "Novel Hybrid CIS/Si Near-IR Sensor and 16% PV Energy-Harvesting
Technology"). NDL is currently cooperating closely with academic and industry partners
including National Taiwan University, National Tsinghua University, and AU Optronics to
continue the development of these solar cells. Operating a consortium servicing CIGS-PV
equipment/material venders, PV manufacturers and research teams will be our main mission.


  Monolithic 3DICs
Monolithic 3D ICs will potentially offer the advantages of reduced chip area,
high speed, high density, low power consumption, lower cost, and better integration of
heterogeneous structures.Researchers at NDL have used cutting-edge low thermal-budget
thin film technologies including lowdefect plasma films and green-light nanosecond laser
spike annealing to demonstrate a novel 3D NVM/CMOS Hybrid Chip. The team's R&D
results were recognized at the IEEE International Electron Devices Meeting (IEDM).
(3D Electronic Elements, published in 2012 IEDM "3D Ferroelectric-like NVM/CMOS Hybrid
Chip by sub-400oC Sequential Layered Integration")


  New breakthroughs in triangular germanium fin transistors
Researchers at NDL have used high-speed germanium to more than double chip
processing speed (the ("111”) face was used to increase the current by a factor of over two).
This breakthrough is expected to greatly benefit 3C products. The NDL team uses selective
etching to achieve nearly defectfree germanium channels, which is used to fabricate a
triangular Ge gate-all-around (GAA) FinFET on a SOI substrate. The resulting new triangular
structure can boost the current in an n-type germanium device.

2011 Introduction of New Materials and Green Technology-New Generation of High-efficiency,
Green Nano-chips Enabled by Silver, Germanium, and Solar Energy

NDL presented 4 papers at the International Electron Devices Meeting (IEDM), the most
important event in electronics field which was held in Washington, DC, USA,
in December 2011. It is worth mentioning that around 200 papers were selected for
publication from over 600 submitted ones , and among the 20 papers from Taiwan that
were selected for presentation, 4 of them were from NDL, closely following behind NCTU
of 6 and Micronix of 5. The 4 papers by NDL cover technology that introduces silver and
germanium as new materials and a built-in, Si-based solar cell self-powered circuit module,
a green initiative energy-harvesting technology upgraded from the passive energy-saving
technology. The 10 nm device’s technology and the introduction of new materials and
green technology will be vital for future efficacy improvement and chip miniaturization.
By implementing low-resistance silver and high-speed germanium, the straight silver
technology and triangular FinFET surpass the limits of conventional materials and achieved
nearly 3-fold of improvement in transistor speed. IEDM highlighted the papers from NDL
on Ge-transistors and Si-based solar cells with self-powered circuit modules , impressing
the international academia and research communities in microelectronics with the message
that these technologies are vital options for the 10 nm device generation.


2009 Silicon quantum-dot energy-saving storage nano-device
While non-volatile memory (such as flash drives and solid-state hard disks) is a semiconductor
device that shows the fastest market growth, it will be facing technical bottleneck in the 16nm device node and beyond. NDL has recently developed a Si quantum dot energy-saving nano
storage device, which is the first energy-saving device of its kind in the world to facilitate
data storage in nano Si quantum dots directly by applying the electrical field. Since no current is required to change the state of data, such a device is very energy efficient. Having
tremendous potential in the non-volatile memory module business with a market of tens of
billions of USD, this energy-saving nano storage device was chosen as the cover story of
the October 5, 2009 edition of the prestigious physics journal, Applied Physics Letters.

  16nm node new device technology
Taking the leading role in the world, NDL has developed the first 16nm functional static
random access ram (SRAM) single cell (Fig. 1). This technology can fabricate over 15 billion
transistors with a device area of 1 cm2, which is approximately 10 times more than what can
be achieved by the current 45nm node technology. The 16nm device can not only reduce the
sizes of circuit boards for computers or cell phones and lower power consumption, it can also make the portable electronic devices slimmer and more compact. This accomplishment has
been reported in the International Electron Devices Meeting (IEDM), which was held in
Baltimore, USA and is the most important event for electronic devices on December 9, 2009.
The corresponding paper was further selected by the meeting committee as one of the five
late news papers and was ranked as a meeting highlight by foreign electronic media such as
EE Times, IEEE Spectrum and Nikkei Business Publications.